Memory devices typically experience some level of inherent random errors during access operations. These errors are expected and can be corrected during operation. However, if an error rate is sufficiently low, typical correction circuits are able to compensate resulting in error free operation of the memory device. Unfortunately, in some types of memory devices, such as magnetic memories or magnetic random access memories (MRAMs), the rate of inherent random errors introduced during access operations is more likely than in other types of memory devices such as dynamic random access memories (DRAMs). In addition on error correction in memory device, system-level error correction is desirable.